Design Verification Engineer

  • location: Austin, TX
  • type: Contract
  • salary: $38.66 - $59.19 per hour

job description

Design Verification Engineer

job summary:
A Design Verification Engineer is needed for an American social media conglomerate corporation in the Austin, TX area. Design verification engineer with considerable CPU knowledge. Participate in defining UVM infrastructure for the entire family of core IPs.

Location:

Austin (preferred), Redmond, Menlo are acceptable alternatives 
location: Austin, Texas
job type: Contract
salary: $38.66 - 59.19 per hour
work hours: 8am to 5pm
education: Bachelors
 
responsibilities:
  • Capable of rapidly deploying UVM environments from clean sheet.
  • Equally capable at pre-silicon verification as well as in post-silicon / emulation.
  • Work with designer to transition any unit-level work from design to verification.
  • Should possess strong interpersonal skills and be capable of solving technical conflicts in a constructive manner.
Must Haves:

  • CPU verification experience
  • UVM
  • SystemVerilog, Python
  • ARMv7, ARMv8, RISC-V experience
Nice to haves:

  • VPI / DPI experience
  • Formal tools and techniques
  • Performance verification
Education:

  • BSEE, BCSE, BSCE or higher
  • Some industry experience mandatory (internship exp. if recently graduated)
#LI-SJ1

 
qualifications:
  • Experience level: Experienced
  • Education: Bachelors (required)
 
skills:
  • Design Engineer
  • Electrical Engineering
  • Design Verification

Equal Opportunity Employer: Race, Color, Religion, Sex, Sexual Orientation, Gender Identity, National Origin, Age, Genetic Information, Disability, Protected Veteran Status, or any other legally protected group status.

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