Engineer, Validation - III - ITEKJP00019969

  • location: San Jose, CA
  • type: Contract
  • salary: $60 - $65 per hour

job description

Engineer, Validation - III - ITEKJP00019969

job summary:
We have a 4 month contract opportunity for a Validation Engineer in Santa Clara, CA.

Description:

*** THIS IS AN ESSENTIAL POSITION- WILL NEED TO BE 100% ONSITE***************

Description

As a member of the Programmable Solutions group, the candidate will be responsible for product validation with a focus on product functionality and characterization, including evaluation board testing, automation development, test execution and test report generation.

Specific problem statement:

The candidate will be responsible for characterizing eASIC device for transmitter and receiver compliance for the following standards/data rates:

Protocols Data-rate Char requirements

1. PCIe Gen1/2/3/4/5 2.5/5/8/16/32G Electrical Validation and Compliance

2. Ethernet 25.78125/10.3125G/1.25G

3. OIF-CEI3.0 28G

4. JESD 9.8304G/4.9152G

Responsibilities:

- Understanding product documentation including datasheet and register description

- Scripting and implementation of automation for data collection and report generation with lab equipment

- Collection and analysis of statistics to provide recommendations of the correct TX/ RX settings for given data rates.

- Generating validation and investigation report

Minimum Qualifications:

- Hands on experience with test equipment such as oscilloscopes, BERTs and analyzers

- strong characterization experience in SERDES implementations

- Knowledge in FPGAs, SERDES and networking applications

- Expertise in programming and data analysis with Python and Matlab

- Bachelor's degree in Electrical, Electronics or Computer Engineering

- Good logical thinking and communication skill

Assignment Duration:

- 3 months

Candidate needs to have a hardware background

SERDES Validation and Characterization Engineer skillsets needed:

- Plan and execute the validation of high-speed SERDES chip NRZ.

- Hands-on experience with test setups and measurements, using BERTs, and Pattern generators and Scopes.

- Worked on FPGA's, Signal Integrity : VNA, TDR, ADS, Insertion loss and Return loss, Phase noise measurement.

- Serdes PHYs (PLL,CDR,Jitter Analysis and Jitter Tolerance)

Preferred Qualifications:

- Deep knowledge in analog and digital design

- Familiar with MS Office Suite

 
location: San Jose, California
job type: Contract
salary: $60 - 65 per hour
work hours: 8am to 4pm
education: Bachelors
 
responsibilities:
- Understanding product documentation including datasheet and register description

- Scripting and implementation of automation for data collection and report generation with lab equipment

- Collection and analysis of statistics to provide recommendations of the correct TX/ RX settings for given data rates.

- Generating validation and investigation report

Minimum Qualifications:

- Hands on experience with test equipment such as oscilloscopes, BERTs and analyzers

- strong characterization experience in SERDES implementations

- Knowledge in FPGAs, SERDES and networking applications

- Expertise in programming and data analysis with Python and Matlab

- Bachelor's degree in Electrical, Electronics or Computer Engineering

- Good logical thinking and communication skill

 
qualifications:
  • Experience level: Experienced
  • Minimum 3 years of experience
  • Education: Bachelors (required)
 
skills:
  • Validation
  • SERDES
  • Clock and Data Recovery
  • bert

Equal Opportunity Employer: Race, Color, Religion, Sex, Sexual Orientation, Gender Identity, National Origin, Age, Genetic Information, Disability, Protected Veteran Status, or any other legally protected group status.

Qualified applicants in San Francisco with criminal histories will be considered for employment in accordance with the San Francisco Fair Chance Ordinance.

We will consider for employment all qualified Applicants, including those with criminal histories, in a manner consistent with the requirements of applicable state and local laws, including the City of Los Angeles' Fair Chance Initiative for Hiring Ordinance.

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